#phsx

[chloe-and-kenz]

today in phsx we were talking about teen pregnancies and our TA came up to us and was like what are you guys talking about cause you keep making faces at each other 

[arabsexed]

How to phone sex with someone? Plz answer me i'm gonna have it for the first time with my bf!

This is a informative and simple how to have phone sex article. You and your boyfriend should read it before having sex to be prepared :)

[tymkrs]

XBee: LED/Buzzer Code Analysis Part 4 (CTR/FRQ/PHS)

So now we finally get to setting the variable, temp.  It's first set to the pin of the buzzer. 

temp += (%00100 <<26) which also means

temp = temp + (%00100 <<26) which leads to

temp = pin + (%00100 <<26).

When ch == 0, temp is copied into ctra.  When ch is not == 0, temp is copied into ctrb.  But regardless of what ch is, frqa := calcFrq (freq) which is in our next code analysis block, and phsa := 0.

So what does it mean for temp to be copied into CTRA? 

The answer actually requires somewhat of an understanding of how CTRA works as a command.  CTRA is Counter A's control and CTRB is Counter B's control.  "Each of the two counter modules can control or monitor up to two I/O pins and perform conditional 32-bit accumulation of the value in the FRQx register into the PHSx register on every clock cycle."

How I understand this to mean is that assuming frqa := 1 and phsa := 0 in counter A, Counter A will, on every clock cycle, bump phsa up by 1 because frqa := 1.  If frqa had := 2, then phsa would go up by 2 every clock cycle. 

But let's go back to temp - we have Pin + (%00100 << 26).  In Spin, << means bitshifting.  And what you can see from the above "bit map" of the CTRA/B register is that when you shift back to bit 26, bits 30-26 set CTR's functionality mode.  The pin itself is set in bits 0-14 it seems (A pin and B pin) - and from what I can tell, this temp = Pin + (%00100 <<26) or more often written temp = (%00100 << 26) + Pin means that that particular mode will be run on that particular Pin.

But we haven't looked into what %00100 means.  We know that it determines the counter's mode, but what does the mode do?  Welp, according to the manual and these two helpful guides:

This is NCO single-ended.  This mode causes FRQ to PHS accumulation to occur every clock cycle (every 1).  A 0 in that second column would mean the counter was disabled and there would be no accumulation.  And this effect is on the output of counter A's pin.

NCO stands for numerically controlled oscillator, and from reading around, PHSx[31] means that depending on the value in FRQx, PHSx[31] (and your chosen pin) will toggle after FRQx amount of clock cycles. 

If FRQx = 1, PHSx[31] will toggle the pin every clock.  So clock 0 is off, clock 1 is on, clock 2 is off, clock 3 is on.

If FRQx = 2, PHSx[31] will toggle the pin every 2 clocks.  So clocks 0 and 1 are off, clocks 2 and 3 are on, clocks 4 and 5 are off, etc.

Note, So binary bits are numbered 0 to 31, though at bit number 31, the total binary value is 2^32.  Once the binary value reaches 2^32, it will wrap and go back to 0.  The value at that point will equal 2^31 + 2^30 + 2^29...and all of that will equal 2^32.  PHSx[31] says essentially that if bit 31 is on, then PINA will be on, and if bit 31 is off, PINA will be off.

So this is a sort of PWM that you can get from this counter and mode.  Then the code ends with setting the buzzer's pin as an output and setting result to equal the current system clock cycle.  Note, result is some sort of local variable that automatically occurs.

WHEW!

@atdiy/@tymkrs