U MP3 player based on ISP1362 is designed
The player and integrated design of the memorizer have played a critical role to portability of MP3 player, but meanwhile, it brought a lot of new problems. Such as memory capacity being fixed, if want to load more songs to buy the new products, have caused the huge waste. On the other hand, integrating limits the application in other fields of MP3 player, such as car electron,etc.. Then, separate the memorizer from player and become another developing direction of MP3, also develop this meaning of U MP3 player. Brief introduction of main chip AT89C51SND1 is MP3 demoder chip based on 8 C51 MCU kernels that ATMEL introduces. Its built-in MP3 hardware demoder, support 48kHz, 44.1kHz, 32kHz, 24kHz, 22.05kHz and 16kHz sampling frequency, heavy-bass, middle pitch, high pitch control and heavy and low and surround the sonic effect proportionally. It can adapt to the programmable audio frequency output interface of different DAC on the market, the form of compatible PCM and I2S. The procedure space of built-in 2304B RAM and 64KB Flash, helps users increase the complicated function. And offer MP3, audio frequency clock and USB clock through the built-in phase locked loop. If you want to read U plate, USB host computer control device is essential. For the further staging system in future, this selected works used the powerful USB-OTG chip ISP1362. ISP1362 integrated OTG control device, advanced host computer control device on single chip and setting up the control device outside. OTG control device fully compatible USB2.0 and On-The-Go Supplement 1 of ISP1362. 0 agreements, host computer and device controller compatible USB 2. 0 agreements, and support full-speed transmission and low transmission of 1.5Mbps of 12Mbps. Pursue the chassis picture of zero-one system Systematic hardware structure The setting up of the overall system goes on around AT89C51SND1. Because its inside has demoder of the hardware, the circuit forms uncomplicatedly. By the one piece mechanically controlled ISP1362, read and get MP3 file in U plate out, sends to the demoder of the hardware and decodes at first. Decoded, conveyed the digital signal to the audio frequency DAC CS4330 by the digital audio interface, change, produce the voice signal. Because the signal power that DAC exports is limited, put into the operation amplifier on the rear end, signal after amplifying may direct output is given to apparatuses such as the acoustic enclosure or earphone,etc.. AT89C51SND1 is the one-chip computer based on 51 kernels, so, the minimum system architecture is very simple. Besides Jingzhen and reset circuit of the traditional one-chip computer, there are PLL smoothing circuit and USB interface circuit, . Fig. 2 PLL smoothing circuit and USB interface circuit ISP1362 is 16 bus structure, can't be direct and 8 interface of one-chip computer. So, regard P0 of the one-chip computer as the data bus with P2 mouth and connect on 16 bus lines of ISP1362, will receive P3.4, P3.7 and P3.6 of the one-chip computer, will read and write its data of sequencing control to read etc. and operate through emulation. Besides these fundamental bus connections, ISP1362 also needs to connect some special control pins: A0: Used for determining the control device in order state is still a state of the data: The state of the data that 0 shows, 1 represents the command mode; A1: Used for determining the control device works on the host computer is still the apparatus control pattern: 0 shows that is in the host computer to control (HC) Mode; 1 shows that is in device control (DC) Mode. Connect P1.5 to MCU. P1.5 =Show at 0 o'clock that is in OTG working condition, P1.5 =One shows and is in it is not OTG state. INT1_USB, INT2_USB connect to INT0 and INT1 pin of MCU separately, in order to cut off. ISP1362 has two USB ports, including OTG port and host computer port. Because OTG port includes the host computer function, connects U plate in the system with OTG port. According to USB2.0 agreement, USB host computer needs 2 15ks and serves as apparatus port while lowering TG port, the apparatus does not have pull-down resistor. So ISP1362 has been offered " The flexible joint " The mechanism, control the connecting of resistance by internal register. So does not need to add the pull-down resistor on the outside during hardware design. And export in order to open to leak, so has joined the pulling upward the resistance R14_USB of one 10kW. . Fig. 3 OTG port circuit diagram Initialisation of AT89C51SND1C and ISP1362 Before beginning to broadcast MP3 file, need a series of initialization action. The operation is finished through setting up the relevant register within AT89C51SND1C and ISP1362. Initialisation of AT89C51SND1C In order to broadcast MP3 file normally, should carry on the arrangement of the following aspects to the main control unit AT89C51SND1C first. Initialisation of phase locked loop Clock that it is offered that MP3 demoder and what the audio frequency output interface uses are an internal phase locked loop. The cyclic(al) initialisation of the phase locking is finished by setting up PLLCON, PLLNDIV and PLLNDIV. The formula of its output frequency is: PLLclk =OSCclk* (R+1) /(N+1) . MP3 demoder initialisation The initialisation of MP3 demoder needs to set up MP3CON and MP3CLK. MP3 demoder divides and lacks sum check of data interrupt to cut off two kinds to cut off, can set up it in MP3CON. Deal with and can adopt and inquire about the mark bit way briefly, avoid using and cutting off. MP3 demoder have certain requirement on clock, MPEG I the intersection of MP3 and data demand of form the low clock is 21MHz most, MPEG II form is 10.5MHz. This clock of formulae are: MP3clk= PLLclk/(MPSD4:0+ 1) . Output interface initialisation of audio frequency Need to carry on accurate arrangement to the relevant portion in AUDCON0 and AUDCON1 of the output interface of the audio frequency first before getting two sound channel serial data. Cooperate with DAC chip CS4330, it sets up as follows: Output the 32-bit microcomputer data format (DSIZ =1),The high level in the selective signal of sound channel is a L channel (POL =1),Chosen 256• Data rate of Fs (HLR =0),The output of choosing MP3 demoder is an origin (SRC =0),18 justified right-hand of data (JUST4: 0 =14). In order to hear normal sound, need to set up MP3CLK according to the sampling rate of MP3 to get the clock in the output interface of the accurate audio frequency, the formula of this clock is: AUDclk =PLLclk/(AUCD4:0+ 1) . Initialisation of key set Should realize the human-computer interaction function of broadcasting MP3, needs support of the keyboard, AT89C51SND1C specially offers 4 pieces of interrupted key set interface, can get the state of the key set through reading KBSTA briefly after stopping being can made in these. Only need to start the break of the corresponding interface in KBCON at the time of the initialisation of key set, and then open total interrupted EA. Arrangement of ISP1362 In order to read MP3 file from U plate correctly, should carry on the arrangement of the following aspects to USB control chip ISP1362 first.