#mcm6810

[commodorez]

Solderless Breadboard Compilation

A useful tool for all kinds of prototyping!  Seen here are examples of (in no particular order):

Executing NOPs on an MOS6502, and building a data entry circuit

Crudely adjusting brightness/contrast of a composite video signal

Improving upon the data entry/modification circuit for my 6502 homebrew computer, and testing with an MCM6810

Approximating the function of a Dekatron tube in count-up mode

Dividing a 32 MHz oscillation down to 8MHz

Controlling a device over RS232 via rotary encoder

Reading the contents of an EPROM, one byte at a time

Combining sync and pixel signals to create a proper composite video source

Making phone calls with a rotary dial over the cellular network

[commodorez]

Finally making some progress on the 6502 homebrew front panel logic.  I tested a half-sized version of the address access/increment logic, then drew out a more detailed view on paper for the full sized version.

I’ve also simulated the data entry/access/alteration logic for a single bit.  Now I’m testing/debugging it in meatspace, with real chips. 

I’m learning a few things:

I’m not all that skilled in wiring up actual 7400 series logic chips

Theory and practice aren’t as close as I expected here

I can still make progress and figure out what I’m doing wrong

Don’t reverse the polarity on a chip, then touch it.  You will burn yourself.

Logisim is cool

Never leave an input floating

Pull up/down resistors are your friend

[commodorez]

It works!  It really works!

Here’s what you’re looking at: Blue: Run Red: RAM status Pink: front panel indicator Yellow: front panel latch set low Green: front panel latch set high

Halted state, w/ RAM, front panel indicator, and latch set to zero

Halted state, w/ RAM, front panel indicator, and latch set to one

Running state, w/ RAM & front panel indicator both set to one, latch bypassed and locked to zero

Running state, w/ RAM & front panel indicator set to zero, latch bypassed and locked to zero

I had to make a few changes to account for misrepresentations of the real world logic gates within the simulation.  The D-latch’s clear and preset require negated input, so I swapped the initial OR gates for NOR gates.  The “blue” 74244 Octal 3-state Buffer/Drivers required an inverter for their input lines.

It will take 8 of these circuits to effectively observe and modify data within the machine’s main memory.  All told, it will take 15 chips, and one of them won’t even be fully used by this section of the front panel circuitry.   Plus another 6 chips for the address traversal circuit brings it up to 21.

Next comes the selection circuitry for selecting halt/single step/1MHz clock, memory protect lockout, and examine next/deposit next sequencing.  My goal is to pull off the whole thing in 25 chips.

[commodorez]

The 6502 sits dormant while the 6810 and the front panel demo logic tries to demonstrate a successful deposit.  At least the D-latch seems to be working.

I’m glad that things are actually coming along!