Alphawave Semi, announced successful tapeout of industry’s leading 64 Gbps UCIe die-to-die IP subsystem on TSMC’s 3nm process technology.
Alphawave Semi has successfully completed the design phase of its Gen3 UCIe Die-to-Die (D2D) IP subsystem, operating at 64 Gbps on TSMC's 3nm process, setting a new benchmark for chiplet interconnects. This advancement delivers a bandwidth density of over 20 Tbps/mm, ultra-low power consumption, and low latency, enabling scalable architectures for AI, XPU, and data center applications. The multi-protocol subsystem supports AXI-4, AXI-S, CXS, CHI, and CHI-C2C, ensuring seamless integration across heterogeneous systems. This milestone underscores Alphawave's leadership in high-speed connectivity and compute silicon for the world's technology infrastructure.
