#one-chip computer is embedded

[boncostick-blog]

DSP guides the use of the function

The high-speed digital signal processor TMS320C6000 series DSP of the foreword TI Company supports concurrent processing, adopt very long coding line (VLIW) Architecture, there are 8 functional units (two multipliers and 6 ALUs) in inside ,But concurrent operations of 8 functional units, can carry out eight 32-bit microcomputer orders at the same time within one cycle at most. The order is operated " The assembly line " Operating mode. Can improve the characteristic of the intensive application system of the data greatly while employing high-performance DSP, can finish digital signal processing such as filtering, convolution, FFT or carry on more complicated operation fast, there is very good application prospect in the modern signal is digitally processed. Because internal structural difference, there is difference greatly between series TMS320C6000 and TMS320C54 series guided mode. During development and application TMS320C6000 series DSP, a lot of developers, persons who especially involve for the first time have some difficulties to DSP ROM leading realization, spend a lot of time and energy trying to find out. I combine and develop the embodiment, have recommended realizing the leading concrete method of the external memory storage.

Guide (BOOT) of the guide course DSP system of DSP While referring to systematic power up or resetting, DSP stores the segment in the program code of the external nonvolatile memory to copy in the internal high-speed memory to run through DMA way. In this way, not only can expand DSP definite storage space, but also can give full play to the efficiency of DSP internal resource. Code of user can load inside DSP in the ROM, limit by capacity and price so through the mask way too, and not easy to expand and staging. The guide course of DSP is as follows: 1) After DSP resets, read in the data on the outside CE1 space to the internal procedure space address through DMA way, read in machine formatly and vary with chip (only copy 1KB once of TMS320C6712) more or less . 2) DSP introduces the reset state, begins to carry out the procedure of the internal procedure space address, this section of procedures read in the external main program data to corresponding address of DSP internal procedure space first, then jump and turn into main program execution. First to finish automatically by chip, the more important thing is two-step: Writes the corresponding assembly routine, realize two-shot guide, namely the load of user's main program in user need.

Guide the case study ( 1) failing Interlink the command file ' . cmd) The parameter of chain command file definition interlinkage of file, describe executable code every sections of Duan Mings of system generation and map to the physical space of the goal board. When these length of initial address or section of section writes the mistake, the bootstrap may make a mistake. ( 2) The procedure of the binary scale file format users of the executable code compiles and produces COFF file format under CCS development environment, the all right direct loading COFF file runs in the artificial course. It is but at emulation of debugging through after,last CCS environment runtimes independent goal board, the executable code needs changing into the file format of the binary scale, keep on the external memory storage on the goal board. Need to use the accurate configuration file while changing. ( 3) Hardware circuit (guide the mode, the system clock) of the goal board The hardware circuit of the goal board will influence the normal operation of the bootstrap too, the guide mode substantially as setting up does not correspond to actual external memory storage, systematic clock circuit out-of-operation, the reset signal is permanent and effective, etc. Now combine the development embodiment of TMS320C6212, introduce the leading realization of the external memory storage specifically.

It is a simplified version chip of TMS320C6201 that ROM guides the embodiment TMS320C6212, there is relatively less internal resource, operating frequency is relatively lower, but it is cheap, have very high performance-cost ratio. The operating frequency reachable 150MHz of TMS320C6212, the highest handling capacity is 900MIPS, very suitable medium and small-scale system development. Because FLASH is a kind of high density, non- volatile electric erasing and writing memorizer, the system adopts FLASH as the external memory storage. Except dedicated the hardware programmer can write the binary code into FLASH, can also utilize the debug system of DSP, pass the software programming load. DSP connects with interface of FLASH and is shown as in Fig. 1.

The system Engineering uses C language programming under CCS development environment, so can shorten development cycle, raise operating efficiency, and have good advantage of transplanting nature. Lead the file procedure of the project to be shown as in Fig. 2.

(1) The table vectors.asm of interrupt vector cuts off the vector table and defaults and keeps space of 0x200 byte of 0 start of address of RAM within DSP chip, power up or reset the last, the unattended operation of the chip is reset and broken down. So, reset interrupt vector to set up as the bootstrap (_ boot) Entry address,define the bootstrap one body in being here for boot.asm. Some procedures are as follows: . ref _boot ; Transfer the bootstrap. sect " . vectors" ; One section of statements RESET_RST: ; Reset interrupt vector mvkl. S2 _boot, B0 ; Load and guide the program address mvkh. S2 _boot, B0B . S2 B0 ; Jump and turn into and guide program execution NOP 5(2) Mainly dispose the fundamental register from the leading compilation procedure boot.asm free lance assembly routine, and copy and carry out in RAM of DSP inside the binary scale procedure kept in the outside FLASH. Because TMS320C6712 copies 1KB automatically, the initial address begins from 0x400, the assembly routine is as follows: . sect " . boot_load" ; Define the data segment. ref _c_int00 ; Statement external function. global _boot ; Define the overall function _ boot: ; Set up the control register first, for instance EMIF_GCR,etc., (omitted) ; Copy the procedure in FLASH to RAMmvkl 0x00000400, A4 within DSP; A4 is RAM address pointer | | mvkl 0x90000400,

B4 ; B4 is FLASH address pointer mvkh 0x00000400, A4 | | mvkh 0x90000400, B4zero A1 ; A1 is used as the counting device _ boot_loop: ; DSP begins to read the procedure ldb *B4 ++ in FLASH, B5mvkl 0x0000F200, B6; B6, for number of bytes add 1 that needs copying, A1, A1 | | mvkh 0x0000F200, B6cmplt A1, B6, A0nopstb B5, *A4++[B0] b _boot_loopnop 5mvkl . S2 _c_int00, B0 ; After circulating, jump and transfer to the principal function main and carry out mvkh. S2 _c_int00, B0B . S2 B0Nop 5(3) Main procedure's main.c whether DSP want, realize concrete body of function in main program, principal function main of definition its ') The call in the function _ c_int00 after compiling, so at the end of bootstrap above, will jump and turn into the function _ c_int00, namely the principal function main will be carried out. (4) The procedure link.cmd interlinkage command program of chain command is used for defining address and magnitude of every memorizer of the system, and assign, compile, get corresponding storage space by the last every Section, link.cmd content is as follows: -c-lrts6201 . libMEMORY{vecs: o =00000000h =00000200hBOOT_RAM: o =00000200h l =00000200hIRAM: o =00000400h l =0000c400hCE0: o =80000000h l =01000000hCE1: o =90000000h l =00100000h} SECTIONS{. vectors > vecs fill =0.boot_load > BOOT_RAM fill =0.text > IRAM fill =0.stack > IRAM fill =0.bss > IRAM fill =0.cinit > IRAM fill =0.far > IRAM fill =0.sysmem > IRAM fill =0.cio > IRAM fill =0} (5) Change project file of order on the procedure convert.cmd, produce the executable COFF file after CCS system compiles, collects '. out) ,It needs changing into the binary file, the load is in FLASH again. CCS development system has converse routines: Hex6x.exe executable COFF file (. out) Change into the sexadecimal file ' . hex) Hex2bin.exe sexadecimal file (. hex) Change into the binary file ' . bin) The form of the order line is: Convert.cmd content is as follows among hex6x.exe convert.cmdhex2bin.exe mboot: mboot.out ; Input the file name . Out form - x-map mboot.map; Produce mapping file - image-memwidth 8; Location wide - o mboot.hex of the memory; Output the file name . Hex form ROMSFLASH: org =0,len =0x10000, romwidth =8}

The outside memory that the conclusion realizes TMS320C6712 in sum is uncomplicated in free lance, the more important thing is to understand every partial function after free lance course and procedure of the chip are collected, dispose the real physical address easy to guide code segment and procedure code segment, and initialisation corresponding register and variable correctly.

1 bibliographical reference let beautiful and fragrant, Ma ShuFen, Li FangHui. Principle and application of TMS320C6000 series DSP. Electronic Industry Press, 20002 Texas Instrument. TMS320C6x Assembly Language Tools User's Guide. Texas Instrument, 20003 Texas Instrument. TMS320C6000 Code Composer Studio Tutorial. Texas Instrument, 20004 Texas Instrument. TMS320C62xx Peripherals Reference Guide. Texas Instrument, 20005 Texas Instrument. TMS320C62xx Programmer's Guide. Texas Instrument, 2000

[vovsis-blog]

Have a match clever to think in China to first publish the intersection of cost and most low I/O optimize the intersection of FPGA SPARTAN-3A and platform

Comparable to fairy and think and put out the Spartan

[vovsis-blog]

SYNPLICITY puts out TOTALRECALL

SYNPLICITY puts out TOTALRECALL, verifies methodology of ASIC and carries on revolutionary innovation New technology proves, understand question in an all-round way at a high speed The semiconductor with leading industry designs and verifies Synplicity Company of supplying with trader of software (Nasdaq's listing coaxiality: SYNP) Released 8482 of # of its TotalRecall

[boncostick-blog]

Using research of built-in internal storage of one piece of the Model OTPROM

With the development of speed regulation by frequency variation and computer control technique, Intel 8XC196MC series one-chip computer adapting to electric machine control employs more and more extensive. Compared with 80C196MC, 87C196MC one-chip computer has OTPROM (One Tline Programmable Read-Only Memory) of 16 KB ,Can go on on-chip the intersection of programming and operation, can strengthen cryptographic function. To ordinary control system, its memory capacity is enough large, needn't reuse the external expanded memory " >Memorizer. But OTPROM of 87C196MC one-chip computer has a shortcoming: No EPROM, that is to say that can only programme once, can't realize repeated programming, unfavorable to a large amount of popularization use. When the procedure transplants from the simulator to OTPROM of the one-chip computer, can not guarantee success of the procedure, because of the intersection of EPROM and of one-chip computer, if procedure off-lining to use one one-chip computer once, will obviously cause the huge wasteful use of resources. On the other hand, as to the complex system, if OTPROM capacity of 16KB is not enough, need adopting and expanding the external memory storage " >Memorizer, for guarantee, realize cryptographic function effectively, should it keeps some procedure to be here OTPROM on-chip, it is built-in to involve the one piece at this moment, the external memory " >Connecting the question of the memorizer. This text directs against Intel 87C196MC one-chip computer internal storage " >The intersection of EPROM and of memorizer, provide for using the question under two kinds of situations, can realize repeated method of programming effectively, and can popularize in any other application of programming with one-chip computer series of OTPROM. 1 87C196MC one-chip computer internal storage " >The memorizer programming way Intel 87C196MC one-chip computer supports three kinds of programming ways: The automated programing way (make 87C196MC one-chip computer not use EPROM programmer can be from the outside EPROM to one's own programming) , slave programming way (provided a standard interface for outside EPROM programmer) Real-time the intersection of programming and way (the intersection of programming and way run, can when it is real to make in software control to single the intersection of EPROM and Entrance programming) . Different from other ways, real-time programming can be finished under not entering the whole EPROM programming way. Can only programme OTPROM of Intel 87C196MC one-chip computer, can't erase, but can prove during programming whether have already really programmed. Can adopt 2 kinds of programming methods to 0TPROM: Programme in slave programming way or in the specialized OTPROM programming way. OTPROM has offered the auxiliary memorizer for 87C196MC one-chip computer " >Memory protection means, it can forbid the bus control unit to carry out the outside to fetch and mean cycle, if attempt to load a outside address to PC register, the chip will be reset. The code flying to running of such automatic reset function is offered a kind of extra recovery means too. Should take different programming ways according to the needs of reality while using. 2 87C196MC one-chip computer internal storage " >EA pin (outside visits and allows the end of one-chip computer 87C196MC of repeated programming method of the memorizer, 87C196MC PLCC84-36 foot) Used for controlling and visiting the internal storage " >The memorizer or external memory storage " >Memorizer. Act as EA =O hour, all visits are to one slice of external memories " >The memorizer one; Act as EA =1 o'clock, to 2000H- being to OTPROM/ ROM on-chip in visit of unit in 5FFFH. Under programming way, EA =12. 5 V. Because the level of EA is latched while resetting, it is difficult to realize the choice of the space of procedure by circuit of the external hardware. Control the program address range by employing the routine statement here, it is equivalent to the function of level fluctuation of EA. This text main long the intersection of jump instruction and UMP of assembler language, Intel of application, come realize control visit, external memory " >The function of the memorizer, now introduce two kinds of commonly used methods. 2.1 the intersection of programming and the intersection of operating method and so-called the intersection of 87C196MC and the intersection of one-chip computer and the intersection of EPROM and of OTPROM on-chip, can't realize from " the 0 " actually To " 1 " Programming,and can only finish from "1 " Get to " O " Programming. Introduce this kind of method by simple procedure embodiment as follows. LJMP NEXTl CSEG AT2600H NEXTl: What the above-mentioned sentence represented in fact is LJMP2600H. Its machine code is E79C04, when changing in address 2600H, gets a series of correspondent machine code, through analyzing to these a series of machine code, can receive the principle of this method, set out in Table 1. The representatives of the last one bytes of the machine code E79C04 collect the address (04 has represented 2600H in the routine statement, 14 has represented 3600H . Act as one byte until 4 all " 1" It is all " O " to turn into 4 ,And there is only one " l " each time Turn into " 0 " When, there can be many kinds of different constitutional reform, are set out in Table 2. Because 87C196MC one-chip computer OTPROM can only finish from " 1" Get to " O " Programming,begin to carry out the and 87C196MC one-chip computer one procedure since 2000H, be can skip after the procedure carries out a sub-paragraph from 2000H, for example jump to 4100H (correspondent machine code is E79C1F) at first Other parts of the memory program again. While leaving nonrecoverably, change the machine code E79C1F into E79C1E (correspond to the address is 4000H) ,The procedure jumps to 4000H to begin to carry out, 4100H program segment for the future no longer carried out. While leaving again nonrecoverably, change the machine code E79C1E into E79C1c (correspond to the address is 3A00H) ,The procedure jumps to 3A00H to begin to carry out, 4000H program segment for the future no longer carried out, so as to analogize (namely the final one byte of the machine code is varied to F E C, first groups of changes) while corresponding to Table 2 ,Can reuse the same one-chip computer and carry on numerous programming operation. In this kind of method, the pin EA of the one-chip computer 87C196MC connects the high level. It is suitable for the procedure being brief and has not expanded the external memory storage " >The memorizer, there are only internal storages " >Usable situation of the memorizer. 2. If the internal storage of operating method that 2 is programmed on-chip, outside " >Memory capacity is not enough or because other respects need, demand to expand the external memory storage " >At the memorizer, certainly can choose the intersection of capacity and loud external memory storage " >The memorizer, and does not use the internal storage " >The memorizer, but in this case, the confidentiality of the procedure will be difficult to realize, and waste the memorizer within the one-chip computer " >Storage space. The method to accord with while using can already meet the capacity demand, the realization ciphering operation that the fork can be convenient. In view of begin, carry out from 2000H by the intersection of 87C196MC and procedure of one-chip computer, pin of 87C196MC beautiful to put " 1 " one-chip computer ,Then the one-chip computer procedure will begin to carry out from internal 2000H. Can be after the procedure carries out a sub-paragraph from 2000H (presume arbitrarily according to the needs of reality) Skip, here is different from operation of skipping on-chip, it will jump out one-chip computer 87C196MC 2000H of OTPROM on-chip the range of unit 5FFFH directly. Will change over to the external memory storage automatically at the time of execution as ordering " >In the address range of the memorizer, for example: LJMP8000H, among them 8000H is the external memory storage " >The address in of the memorizer, in this way from one slice of internal memories " >The memorizer is changed over to the external memory storage " >Memorizer. Can pass and revise the external memory storage " >Memorizer (can wipe writing repeatedly) Procedure last procedure debugging,convenient very. Certainly, if need it from the external memory storage " >The memorizer is changed over to the internal storage " >Memorizer hour, the operating method is similar. The detailed analysis of this text has introduced two kinds of operation method of one-chip computer that can realize repeatable programming to conclude the speech, and these two kinds of methods can be popularized to any other programming of one-chip computer with 0TPROM, the thinking of programming is all the same, the concrete experiment has verified these two kinds of methods have practical feasibility.