AMD Versal AI Engine: Powering Next-Gen Intelligence
What is Versal AI engine?
The Versal Premium line, which integrates AI Engines, has exceptional adaptive signal processing capability and is designed for the most demanding compute and data transportation applications in wired communications, data center computation, test and measurement, and aerospace and military.
The AI Engine Array Interface may be configured with to the AMD LogiCORE AI Engine IP. Through tiles included in the AI Engine Array Interface, this array is linked to both the Network on Chip and the programmable logic (PL). This IP specifies the clock controlling the AI Engine array and permits the definition of the number of AXI4-Stream and memory-mapped AXI interfaces with their corresponding width and orientation.
Key Features and Benefits
AXI4 configuration interfaces that are memory mapped.
AXI4 master interfaces that are memory mapped.
AXI4-Stream master and slave interfaces having 32, 64, or 128 bit data widths that may be adjusted.
Fast streams may be enabled by choosing to enable registered interfaces.
Programmable logic (PL) stream clocks automatically associate.
Designing AMD Versal AI Engine
AMD Developing Versal AI Engine with Vitis Model Composer AMD With Vitis Model Composer, algorithms designed for Versal AI Engines may be quickly simulated, explored, and coded from inside the Simulink environment. This may be accomplished by importing kernels and data-flow graphs into Vitis Model Composer as blocks and adjusting the block GUI parameter to control the behavior of the kernels and graphs, or by utilizing the AI Engine library blocks.
Additionally, the tool lets you use a combination of AI Engine and programmable logic (HDL/HLS) blocks to create and simulate a design. By seamlessly integrating Vitis Model Composer AI Engine blocks with Simulink source and sink blocks, simulation results may be viewed.
For usage in the Simulink environment, Vitis Model Composer offers a collection of blocks that are optimized for speed. These consist of:
Comprises a collection of intricate AI Engine DSP building elements pertaining to mixers, FIR, FFT, and DDS.
includes blocks for importing graphs and kernels that may be directed to Versal devices’ AI Engine section.
HLS (Targeting PL and generates HLS code)
Targeting PL and producing HLS code, HLS provides preset blocks that contain bit-wise operations, logic, linear algebra, and math functional blocks.
Block the import of HLS kernels that are intended for Versal devices’ PL section.
HDL (Produces RTL code and targets PL)
Blocks for modeling and synthesizing DSP, arithmetic, and logic components on an FPGA
contains a FIR Compiler block that targets the Versal design’s specific DSP48E1 and DSP48E2 hardware resources.
Blocks that facilitate communication between the AMD HDL blockset and the AI Engine.
Unleash DSP Compute with AMD Versal AI Engines
For next-generation DSP workloads, speed up demanding high-performance DSP applications.
AMD Versal AI Engine Technology Enables High-Performance Digital Signal Processing (DSP) Requirements
Clients developing next-generation DSP applications need enormous computational power, which conventional FPGA designs cannot effectively provide. Large quantities of DSP blocks and programmable logic resources may be used by compute-intensive DSP applications like FIR, FFT, and General Matrix Multiply.
The total computation capability that conventional programmable logic devices may provide may be greatly diminished by this need. For demanding DSP workloads with stringent power constraints, just expanding the number of DSP blocks and programmable logic available is not a scalable solution.
In these situations, Versal AI Engines are intended to provide a more effective computing solution.
Boost Compute and Use Less Power
Optimize performance and transform your DSP designs.
Did you know that you may increase scalability and efficiency to satisfy the growing needs of high-performance, next-generation DSP applications? Learn 5 strategies to improve your DSP designs using AMD Versal AI Engines.
Access Benchmarks Comparing Versal AI Engines to Previous Programmable Logic Technology
Please get in touch with sales or your FAE for test results and source designs for head-to-head benchmark comparisons between designs that use just Programmable Logic and adaptable SoC + AI Engine designs that use AMD Versal adaptable SoCs.
Get Started with Versal AI Engines for DSP
Increase DSP compute density for the next generation of demanding DSP workloads by speeding up the most demanding high-performance DSP applications.
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